(1) Field of the Invention
The present invention relates to a manufacturing method of a magnetic memory that is useful to be mounted on a semiconductor integrated circuit device, and a manufacturing method of the semiconductor integrated circuit device. In particular, the magnetic memory is useful as a non-volatile memory to be mounted on a semiconductor integrated circuit device having a CMOS (complementary MOSFET).
(2) Description of the Related Art
Development of a technique of incorporating a memory using a magnetic material into a semiconductor integrated circuit device has recently been advanced. In particular, in a method of programming a magnetic memory using spin transfer, miniaturization leads to reduction of programming current. Thus, the magnetic memory can be easily adapted to scaling of a semiconductor device, and is expected as a new memory device.
A spin-transfer torque memory utilizes the TMR (Tunnel Magneto-Resistance) effect. The memory is characterized in that a laminated film (hereinafter, referred to as a TMR laminated film) of a dielectric layer (tunnel film) and plural magnetic materials is used. The TMR laminated film is a complicated film formed by laminating various materials. Accordingly, in order to process the TMR laminated film, it is necessary to adapt an ion milling method in which a high-energy ion is applied to a target object for physical etching, without adapting an RIE (Reactive ion etching) method used in normal manufacturing of a semiconductor. The ion milling is an etching method in which a chemical reaction with a target object is not used, and is suitable for processing a wide range of materials. In particular, the ion milling is a technique which has been used for processing a memory using a magnetic material.
U.S. Pat. No. 7,468,542 and Japanese Patent Application Laid-Open publication No. 2005-116888 are such examples.
In the process of the TMR laminated film, the ion milling is disadvantageous in the following points. Specifically, an etching target is redeposited in a film shape onto side walls of a processed pattern. In the case where a magnetic memory is mounted on a semiconductor integrated circuit device, scattering and redepositing of the etching target causes contamination of a semiconductor manufacturing device and a manufacturing line. As a result, scattering and redepositing of the etching target becomes a problem in securing stable characteristics of a magnetic memory, a semiconductor device, and a semiconductor integrated circuit device to be manufactured.
A specific problem will be described with a structure example of a typical spin-transfer torque memory. FIGS. 19 to 21 are cross sectional views, each schematically showing a main part of a magnetic memory immediately after a hard mask is formed by ion milling using a resist (photo resist) as a mask.
FIG. 19 shows a state after a hard mask/upper electrode lead layer HMM is completely processed. Specifically, an inter-wiring-layer electrode plug PLUG is provided in a dielectric film INS1 formed on a substrate, and a lower electrode layer BM, a magnetic laminated film TMR, and an upper electrode film UM which constitute a magnetic memory are laminated thereabove. On a certain portion of the upper electrode film UM, the hard mask/upper electrode lead layer HMM and a resist RES used for processing are provided. FIG. 19 shows a state immediately after forming the hard mask HMM by ion milling RIE using the resist RES as a mask. The reference numerals of the same constituent elements in FIGS. 19 to 21 are not repeatedly shown, and only new constituent elements and constituent elements necessary for explanation are shown.
FIG. 20 shows a state in which the resist RES used for processing is removed in the state of FIG. 19, and the upper electrode UM and the magnetic laminated film TMR are processed by applying ion milling using the hard mask HMM as a mask. In FIG. 20, redepositions REDEP which are mainly composed of the upper electrode film UM and contain some component of the magnetic laminated film TMR are deposited in a film shape onto side walls of the hard mask HMM. The redepositions REDEP are generated due to the process itself of ion milling, and thus, it is difficult to remove the same after deposition.
FIG. 21 shows a state in which further steps are performed from the state of FIG. 20. An interlayer dielectric film INS2 is laminated on the entire surface of the structure of FIG. 20. Thereafter, CMP (Chemical Mechanical Polishing) is performed to planarize the surface of the substrate before formation of wiring, and an upper end surface of the hard mask HMM is exposed. At this time, the redepositions REDEP as well as the upper surface of the hard mask HMM are exposed, and are polished together with the interlayer dielectric film INS2 and the hard mask HMM in a CMP device. Such polishing causes contamination of the CMP device itself due to spread of a magnetic material contained in the redepositions REDEP within the CMP device. If the manufacturing steps are continued, the contamination is spread to a device for laminating a wiring layer BL. The contamination leads to a serious problem in a line for manufacturing a semiconductor integrated circuit device such as a CMOS. It is necessary to remove the redepositions on the side walls of the hard mask HMM caused by the ion milling before the interlayer dielectric film INS2 is laminated.
The present invention is to provide a manufacturing method of a magnetic memory in which depositions deposited onto side walls of a hard mask can be removed before a CMP process, and a manufacturing method of a semiconductor integrated circuit device on which the magnetic memory is mounted.